via「Google News search」：https://www.designworldonline.com/modern-practices-in-pcb-design-verification/

It is easy for the complicated PCBs of today to contain a number of subtle errors that escape the notice even of experts in a traditional manual peer review process. It takes a modern, automated verification approach to catch schematic errors at the source. To reduce reliance on experts, the trend is to provide analysis tools that engineers who are non-specialists can use within their familiar design authoring environment. These modern approaches provide significant benefits for both design engineers and engineering project managers.
In the past, peer reviews done before PCB layout worked reasonably well for simple designs on a single PCB. This manual process became unwieldy for bigger designs. Schematic errors that got past the manual review went into PCB layout. They often remained undetected until the prototyping phase. These errors typically caused failures that require lab debugging time to identify the root cause. Errors that should have been caught prior to layout, where they are easily corrected, ended up causing costly design re-spins.


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